Damascene techniques generally involve depositing an interlevel dielectric (ILD) layer, forming an opening in the ILD, overfilling the opening with a metal such as copper (Cu), and removing excess metal using chemical mechanical polishing (CMP). Multiple ILD layers are typically used which results in an overall interconnect structure having many wiring levels. The openings typically resemble a trench running essentially parallel to the surface of the substrate, and a filled trench is referred to as a “wire” or a “line”. These are used to route signals from one location on an integrated circuit (IC) to another location. The openings forming the trench (for the wire) may extend only partially into the thickness of the ILD from the top surface. In dual damascene techniques, an opening in the ILD includes both a lower via (to contact the line beneath) in communication with an upper trench (and further may include other trenches without associated vias). Both the via and the trench are simultaneously filled. Several types of techniques are utilized, including via-first, trench-first and buried-via (though the resulting structure is generally the same for each technique).
The trench first metal hard mask (TFMHM) method has the potential to control the trench top critical dimension (CD) in the damascene structure. However, this method does not appear to adequately control via top CD because this current method includes a non-self aligned via etch process. The current process, as described more fully below, must pattern the via fairly precisely as the vias may not be overly large and misalignment to the underlying trench pattern must be minimized. This is critical to maintain sufficient dielectric spacings between metal features that are defined by via and trench patterning and placement. In addition, after opening the trench, partially etching for the vias therein, and stripping the mask layer(s), the final trench (and via) etching process—which utilizes a remaining metal hard mask layer (e.g., TiN)—needs to be precisely controlled because the chemistry(ies) used to etch the dielectric layer also removes a significant portion of the hard metal mask layer (e.g., TiN) during the process. Thus, the hard metal mask layer must be rather thick to appropriately act as the mask for etching.
Accordingly, there is needed a damascene fabrication process (and structure) that results in a self-aligned via etch process. In addition, there is needed fabrication process that allows for a thinner metal hard mask layer within a TFMHM damascene process.